1. Field of the Invention
The present invention relates to a method for examining the surface of a copper layer in a circuit board and a process for producing the same. In particular, it is concerned with a method for previously measuring the degree of oxidation of the surface of a copper layer in a circuit board when the surface of the copper layer in the circuit board is subjected to etching or plating.
2. Description of the Related Art
A printed circuit board is a board, on which elements, such as LSI, are to be mounted. An actual electronic circuit is completed by using this board.
With respect to electronic equipment, a reduction in size, a reduction in weight, a reduction in thickness, rendering the equipment multifunctional and an improvement in performance have lead to an ever-increasing demand for an increase in density and an increase in precision of printed circuit boards. This has resulted in a further increase in fineness and degree of multilayer interconnection.
At the present time, a high-density interconnection having a conductor width (a pattern width) of 50 .mu.m and 3 or more lines between IC pins are necessary. For this reason, it is difficult to form the circuit by printing, so that photolithography using a dry film resist or a liquid photosolder resist is utilized.
The method for forming a circuit in a printed circuit board is roughly divided into a subtractive method in which copper is removed by etching and an additive method in which only a necessary portion is plated with copper. Although they are further divided into respective several groups, the subtractive method includes the step of effecting patterning of a copper layer using a resist. Also in the case of the additive method, the step of patterning of the copper layer with a resist becomes necessary with an increase in the degree of multilayer interconnection- Thereafter, in the case of the subtractlye method, copper is removed with etching, while in the case of the additive method, copper plating is carried out.
Patterning of the copper layer followed by etching often causes the resist to be peeled off. When the plating is effected, dive of plating into under the resist in addition to peeling of the resist often occurs. These phenomena are causative of short-circuit of the interconnection and breaking of interconnection, which is a large cause of a lowering in yield in the production of printed circuit boards.
Accordingly, an object of the present invention is to provide a method for preventing the above-described problems, i.e., peeling of the resist and dive of plating into under the resist.